General Resources for PowerPC Developers
These resources have been curated to be useful to many kinds
of PowerPC developer, including ones targeting classic hardware
and those targeting the newest Power9 and Power10 systems.
- Freescale/NXP
AN2491: Simplified Mnemonics for PowerPC Instructions
(local mirror)
- This Application Note describes the simplified mnemonics
that most assemblers accept, and the full instruction to which
they resolve. This can be useful in both directions; if you are
looking at disassembly of a compiled object and wondering why
the assembler transformed one instruction into another, this
may hold the answer.
- IBM
Power Functional Simulator (local mirror -
read the license first!)
- The PFS has its origins as a research project named Mambo
(local mirror). It runs on some
major x86_64 systems and allows you to boot a fully functional
Linux on Power system in either endianness (big or little). This
can be a useful utility for systems programming if you do not
want to have to reboot your physical Power system frequently.
- The PowerPC Compiler Writer's Guide
(no external link)
- This guide from IBM is dated 1996, but gives all developers
a helping of useful "tricks" in chapter 5 that still
apply to this day. Those targeting older 6xx chips will additionally
appreciate the documentation on how to make the most of this
hardware.
- Note well! The ABI described here is not the ABI used
by Linux distributions using the musl libc. These distributions
use a Secure PLT mode that is not covered by this guide.
- PowerPC Version 2.02, Books I-III (no external link)
- These books describe the PowerPC architecture. This is useful
for writing assembly, systems programmers, tuning, and understanding
some of the intracices of the ISA. This version corresponds roughly
to the "G4" (74xx) generation of PowerPC chip.
- Power ISA Version
2.03 (no external link)
- Once thought lost to the sands of time, this is the first
release of IBM's then-nascent Power.org initiative. It is the
first combination of the POWER and PowerPC architectures into
a single, cohesive unit. This tome describes the architectural
features of processors including the Freescale e500 DSP, the
IBM 970 with VMX ("AltiVec"), and POWER5 and
POWER6 systems.
- Power
ISA Version 2.07 B (local
mirror)
- This Power.org release describes the features new to the
POWER8 chip. This includes transactional memory, VSX-2, cryptographic
acceleration instructions, and hardware CRC support.
Verified for technical accuracy: February 4, 2024
Verified for editorial accuracy: February 4, 2024